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國際期刊論文

  • Xin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Lin, and An-Yeu Wu, “An 8.29mm2 52mW Multi-mode LDPC Decoder Design for Mobile WiMAX System in 0.13um CMOS Process,” IEEE Jour. Solid-State Circuits (JSSC), vol. 43, no. 3, pp. 672-683, Mar. 2008 (Full paper, SCI/EI).

  • Min-An Chao, Xin-Yu Shih, and An-Yeu Andy Wu, “Matrix Merging Scheme and Efficient Decoding Techniques for Reconfigurable QC-LDPC Decoders,” Journal of Signal Processing Systems, 68.2 (2012), pp. 183-202, 2012 (SCI/EI).

  • Hua Wang, Chun-Hsien Peng, Yaopei Chang, Richard Z. Huang, Chih-Wei Chang, Xin-Yu Shih, Chia-Jui Hsu, Paul C. P. Liang, Ali M. Niknejad, IEEE Fellow, George Chien, Chao Long Tsai, and H. C. Hwang, “A Highly-Efficient Multi-Band Multi-Mode All-Digital Quadrature Transmitter, ” IEEE Transactions on Circuits and Systems I : Regular Papers (TCAS-I), 61(5),  pp. 1321-1330, May 2014 (SCI/EI).

 

 

國際會議論文

  • Xin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Lin, and An-Yeu Wu, "A 19-mode 8.29mm2 52-mW LDPC Decoder Chip for IEEE 802.16e System," in Proc. Int. Symposium on VLSI Circuits (SOVC-2007), Kyoto, JAPAN, June 2007, pp. 16-17.

  • Xin-Yu Shih, Cheng-Zhou Zhan, and An-Yeu Wu, “A Real-time Programmable LDPC Decoder Chip for Arbitrary QC-LDPC Parity Check Matrices,” in Proc. IEEE Asian Solid-State Circuits Conf. (ASSCC-2009), Taipei, TAIWAN, Nov. 2009, pp. 369-372.

  • Cheng-Hung Lin, Fan-Min Li, Xin-Yu Shih, and An-Yeu Wu, “A Triple-Mode MAP/VA IP Design for Advanced Wireless Communication Systems,” in Proc. IEEE Asian Solid-State Circuits Conf. (ASSCC-2005), Hsinchu, TAIWAN, Nov. 2005, pp. 221-224.

  • Xin-Yu Shih, Cheng-Zhou Zhan, Cheng-Hung Lin, and An-Yeu (Andy) Wu, "A 52-mW 8.29mm2 19-mode LDPC Decoder Chip for Mobile WiMAX Applications," in Proc. IEEE Asia and South Pacific Design Automation Conf. (ASP-DAC-2009), Yokohama, JAPAN, Jan. 2009, pp. 121-122.

  • Xin-Yu Shih, Cheng-Zhou Zhan, and An-Yeu (Andy) Wu, "A 7.39mm2 76mW (1944, 972) LDPC Decoder Chip for IEEE 802.11n Applications,” in Proc. IEEE Asian Solid-State Circuits Conf. (ASSCC-2008), Fukuoka, JAPAN, Nov. 2008, pp. 301-304.

  • Cheng-Zhou Zhan, Xin-Yu Shih, and An-Yeu Wu, “High-Performance Scheduling Algorithm for Partially Parallel LDPC Decoder,” in Proc. IEEE Int. Conf. Acoustic, Speech, Signal Processing (ICASSP-2008), Las Vegas, USA, Mar. 2008, pp. 3177-3180.

  • Yu-Hsin Chen, Yi-Ju Chen, Xin-Yu Shih, and An-Yeu Wu, “A Channel-Adaptive Early Termination strategy for LDPC decoders,” in Proc. IEEE Workshop on Signal Processing Systems (SiPS-2009), Tampere, FINLAND, Oct. 2009, pp. 226-231.

  • Min-An Chao, Jen-Yang Wen, Xin-Yu Shih, and An-Yeu (Andy) Wu, “A Triple-Mode LDPC Decoder Design for IEEE 802.11n System, ” in Proc. IEEE Symposium on Circuits and Systems (ISCAS-2009), Taipei, TAIWAN, May 2009, pp. 2445-2448.

  • Jie-Wei Lai, Chi-Hsueh Wang, Kaipon Kao, Anson Lin, Yi-Hsien Cho, Lanchou Cho, Meng-Hsiung Hung, Xin-Yu Shih, Che-Min Lin, Sheng-Hong Yan, Yuan-Hung Chung, Paul C.P. Liang, Guang-Kaai Dehng, Hung-Sung Li, George Chien, Robert Bogdan Staszewski, “A 0.27 mm2 13.5 dBm 2.4 GHz all-digital polar transmitter using 34%-efficiency Class-D DPA in 40nm CMOS, ” in Proc. IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC-2013), San Francisco, CA, Feb. 2013, pp. 342-343.

  • Hua Wang, C.-H. Peng, Chao Lu, Yaopei Chang, Richard Huang, Andy Chang, Genie Shih, Ray Hsu, Paul C. P. Liang, SangWon Son, Ali Niknejad, George Chien, CL Tsai, and HC Hwang,  “A highly-efficient multi-band multi-mode digital quadrature transmitter with 2D pre-distortion, ” in Proc. IEEE International Symposium on Circuits and Systems (ISCAS-2013), Beijing, China, May 2013, pp. 501-504.

 

 

專利發表與技術轉移

  • USA Patent, No. 8,296,622, “Programmable LDPC code decoder and decoding method thereof,” by Xin-Yu Shih and An-Yeu Wu, Granted on 2012/10/23.   [備註] : 此專利技轉給國際廠商 (2013年10月29日)

  • ROC (Taiwan) Patent, No. I380598, “可程式化的低密度奇偶校驗編碼之解碼裝置及其解碼方法,” 施信毓、吳安宇  Granted on 2012/12/21.  [備註] : 此專利技轉給國際廠商 (2013年10月29日)

 

 

 

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